Image Recognition Processor
Description | The TMPV76 Series are image recognition processors that process input video images in real-time. They detect target objects such as persons, faces, hands, vehicles, traffic lanes, and so on. The series can be used for camera vision systems utilizing various image-recognition technologies such as Advanced Driver Assistance System (ADAS), Intelligent Transport System (ITS), surveillance camera, gaming device, and energy control system for air conditioning and lighting, etc. |
---|---|
RoHS Compatible Product(s) (#) | Available |
Assembly bases | 日本 |
Toshiba Package Name | P-FBGA796-2727-0.80-001 |
---|---|
Package Image | ![]() |
Pins | 796 |
Mounting | Surface Mount |
Please refer to the link destination to check the detailed size.
Property | 数值 | 单位 |
---|---|---|
CPU (MeP) | 2 | - |
clock frequency (MeP) | 266.7 | MHz |
image processing processor (MPE) | 8 | - |
clock frequency (MPE) | 266.7 | MHz |
image processing processor (L2 cache) | 256 | Kbyte |
image processing accelerator affine transform | 3 | ch |
image processing accelerator filter | 2 | ch |
image processing accelerator histogram | 1 | ch |
image processing accelerator histogram of oriented gradients(HOG) | 1 | ch |
image processing accelerator matching | 2 | ch |
image processing accelerator Enhanced CoHOG | 2 | ch |
image processing accelerator Pyramid | 2 | ch |
image processing accelerator SfM | 1 | ch |
ROM type | Mask ROM | - |
ROM size | 80 | Kbyte |
RAM size | 1632 | Kbyte |
video input interface | 4 | ch |
camera input port | 8 | ch |
video output interface | 1 | ch |
Memory controller | LPDDR2-SDRAM / SRAM / NOR Flash | - |
DMA controllers | 5 | ch |
external MCU I/F (8bit parallel bus) | 1 | ch |
CAN interface | 3 | ch |
I2C | 8 | ch |
UART | 5 | ch |
SPI | 4 | ch |
PCM | 2 | ch |
timer/counter | 32 | ch |